Switched-capacitor structures typically utilize a plurality of capacitors having the plates thereof switched from the input of a differential amplifier to another voltage or to the output of a previous stage, which also incorporates the output of a differential amplifier. These capacitors are normally formed on an integrated circuit from a combination of semiconductor material, metal and oxide. Typically, the semiconductor material is incorporated as a bottom plate of the capacitor and, as such, this type of capacitor suffers from a large voltage co-efficient, due to semiconductor depletion/accumulation. These capacitors are normally avoided in high precision switched-capacitor filters and capacitor-array data converters.
Another type of capacitor that has been utilized in switched-capacitor structures is a poly-to-poly capacitor which is described in U.S. patent application Ser. No. 455,171, filed Dec. 22, 1989 and entitled "Compensated Capacitors for Switched-Capacitor Input of an Analog-to-Digital Converter" and U.S. Pat. No. 4,918,454, which are incorporated herein by reference. This type of capacitor has gained wide acceptance among analog MOS designers due to an extremely low voltage co-efficient that results from the compensation of one plate's depletion by the other plate's accumulation. The disadvantage of the poly-to-poly capacitor is the additional processing required to deposit a second polysilicon layer and grow a thin oxide layer for the capacitor dielectric.
One type of capacitor, a metal-to-metal polysilicon capacitor, is described in C. Kaya, H. Tigeliaar, J. Paterson, M. DeWit, J. Fattaruso, D. Hester, S. Kiriakai, K. Tan and F. Tsay, "Polycide/Metal Capacitors for High Precision A/D Converters", IEDM, 1988, pp. 782-785, which is incorporated herein by reference. These capacitors display a voltage coefficient approaching that of the poly-to-poly capacitor, particularly if the polysilicon is silicided. However, the relatively thick oxide that exists between the metal and polysilicon layers in standard MOS processing technology forces the designer to accept a plate area substantially greater than poly-to-poly types of comparable capacitance value.
In a switched-capacitor network, certain capacitor plates are particularly sensitive to stray noise coupling. Typically, the plates are in some manner connected to virtual ground. To reduce the noise sensitivity, the top plate of a two-plate capacitor structure is used as a sensitive "virtual ground" capacitor plate, so that the bottom plate can shield the sensitive node from substrate noise. However, two-plate capacitors implemented in this manner are still susceptible to noise coupling onto the sensitive top plate through passivation and packaging dielectrics.